? semiconductor components industries, llc, 2006 june, 2006 ? rev. 3 1 publication order number: NCP5500/d NCP5500, ncv5500, ncp5501, ncv5501 500 ma linear regulator these linear regulators provide up to 500 ma over a user ? adjustable output range of 1.25 v to 5.0 v, or at a fixed output voltage of 1.5 v or 5.0 v*, with typical output voltage accuracy better than 3%. ncv versions are qualified for demanding automotive applications that require site and change control. NCP5500 and ncv5500 versions include an enable/shutdown function and are available in a dpak ? 5l power package. in shutdown, current consumption is reduced to 30 a. an internal pnp pass transistor permits low dropout voltage and operation at full load current at the minimum input voltage. ncp5501 and ncv5501 versions are available in dpak ? 3l for applications that do not require logical on/off control. this regulator family is ideal for applications that require a broad input voltage range, including both automotive and portable battery powered devices. integral protection features include short circuit current and thermal shutdown. features ? output current up to 500 ma ? 2.9% output voltage accuracy ? low dropout voltage ? enable control pin (NCP5500 / ncv5500) ? reverse bias protection ? short circuit protection ? thermal shutdown ? operating temperature range of ? 40 c to +125 c (ncv5500 / ncv5501) ? ncv prefix for applications that require site and change control ? these are pb ? free devices typical applications ? automotive ? industrial and consumer ? post smps regulation ? point of use regulation figure 1. typical application circuit input off on en in 100 nf output adj gnd NCP5500 1 2 5 4 3 r l 4.7 f ncv5500 out p5500xg alyww 15 dpak 5 center lead crop case 175aa see detailed ordering and shipping information in the package dimensions sect ion on page 7 of this data sheet. ordering information marking diagrams http://onsemi.com p or v = p (ncp), v (ncv) 5500/1 = device code x = output voltage = l = 1.5 v = u = 5.0 v = w = adjustable g= pb ? free package a = assembly location l = wafer lot y = year ww = work week pin 1. en 2. in tab, 3. gnd 4. out 5. nc/adj dpak 5 1 2 3 4 dpak single gauge case 369c dpak pin 1. in tab, 2. gnd 3. out 13 v5501xg alyww 5 1 *contact on semiconductor for other fixed voltages.
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 2 pin function descriptions pin no. symbol description NCP5500 / ncv5500 ? dpak 5 lead center lead crop 1 en output enable; high level turns on the output. 2 in input; battery/unregulated supply input voltage. 3, tab gnd ground; pin 3 connected internally to the tab heat sink. 4 out output; bypass to ground. 5 nc / adj no connection (fixed output versions only). voltage ? adjust input. use an external voltage divider to set the output voltage over a range of 1.25 v to 5.0 v. adjustable version only. ncp5501 / ncv5501 ? dpak 3 lead 1 in input; battery/unregulated supply input voltage. 2, tab gnd ground; pin 3 connected internally to the tab heat sink. 3 out output; bypass to ground. figure 2. block diagram ? + nc / adj en in gnd out connection for adjustable output connection for fixed output error amplifier current limit and saturation sense bandgap reference thermal shutdown connection for enable en and adj pins are applicable to NCP5500 / ncv5500 only.
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 3 absolute maximum ratings t a = ? 40 c to +85 c (NCP5500, ncp5501), t a = ? 40 c to +125 c (ncv5500, ncv5501), unless otherwise noted. pin symbol, parameter symbol min max units in, v in , dc input voltage v in ? 7.0 +18 v out, en, v out , v en , dc voltage v ? 0.3 +16 v in + 0.3 (note 4) v junction temperature t j +150 c package dissipation dpak 5 power dissipation at t a = 25 c thermal resistance, junction ? to ? air thermal resistance, junction ? to ? case dpak power dissipation at t a = 25 c thermal resistance, junction ? to ? air thermal resistance, junction ? to ? case p d r ja r jc p d r ja r jc internally limited 75 8.0 internally limited 101 6.6 c/w storage temperature t stg ? 55 +150 c moisture sensitivity level msl 1 ? esd capability, human body model (note 1) esd hbm 4000 ? v esd capability, machine model (note 1) esd mm 200 ? v esd capability, charged device model (note 1) esd cdm 1000 ? v lead temperature soldering reflow (smd styles only), pb ? free versions (note 3) t sld 265 peak c operating ranges in, v in , operating dc input voltage v in v out + v do , 2.5 v (note 5) 16 v out, v out adjust range (adjustable version only) v out 1.25 5.0 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) esd charged device model tested per eia/jes d22/c101, field induced charge model 2. latch ? up current maximum rating: 100 ma per jedec standard: jesd78. 3. pb ? free, 60 sec ?150 sec above 217 c, 40 sec max at peak temperature 4. maximum = +16 v or (v in +0.3 v), whichever is lower. 5. minimum v in = 2.5 v or (v out + v do ), whichever is higher.
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 4 electrical characteristics v in = 2.5 v or (v out + 1.0 v), whichever is higher, c o = 4.7 f, ? 40 c < t a < 85 c (<125 c for ncv versions), t j < 150 c unless otherwise noted. characteristic symbol test conditions min typ max unit output output voltage (note 6) fixed output versions adjustable voltage versions v out t a = 25 c, i o = 50 ma t a = 25 c, i o = 50 ma 2.9% 2.9% v output voltage (notes 6 and 7) v out 1.0 ma < i o < 500 ma ? 4.9% +4.9% v line regulation (note 7) reg line i o = 50 ma 2.5 v or (v out + 1.0 v) < v in < 16 v 0.1 1.0 % load regulation (note 7) reg load 1.0 ma < i o < 500 ma 0.35 1.0 % dropout voltage fixed output versions v do (note 8) i o = 1.0 ma, v out = ? 2% i o = 500 ma, v out = ? 2% 20 300 90 700 mv dropout voltage adjustable output versions v do (note 9) i o = 1.0 ma, v out = ? 2% i o = 500 ma, v out = ? 2% 20 300 90 700 mv ground current i gnd i o = 100 a i o = 500 ma (note 7) 300 10 500 20 a ma quiescent current in shutdown (NCP5500, ncv5500) iq adjustable and 1.5 v versions all other versions 30 40 50 50 a current limit i out(lim) v out = 0 v (note 7) 500 700 900 ma ripple rejection ratio rr f = 120 hz 75 db output noise voltage (note 10) v n f = 10 hz to 100 khz, v in = 2.5 v v out = 1.25 v, i o = 1.0 ma f = 10 hz to 100 khz, v in = 2.5 v v out = 1.25 v, i o = 100 ma 20 34 vrms minimum output capacitance / esr for stability c out / esr 5.0 ma < i o < 500 ma t a = 25 c 4.7 f / 3 enable (NCP5500, ncv5500 only) enable voltage v enoff v enon off (shutdown) state on (enabled) state 2.0 0.4 v enable pin bias current i en v en = v in , v in = 2.5 v, i o = 1.0 ma ? 1.0 a adjust adjust pin current (note 11) i adj v en = v in , v adj = 1.25 v, v out = 1.25 v ? 60 na thermal shutdown thermal shutdown temperature (note 11) tsd i o = 100 a 150 ? 210 c 6. deviation from nominal. for adjustable versions, pin adj connected to out. 7. use pulse loading to limit power dissipation (duration < 100 ms and duty cycle < 1%). 8. v do = v in ? v out . for <2.5 v versions, v do will be constrained by the minimum input voltage of 2.5 v. 9. v do = v in ? v out . for output voltage set to <2.5 v, v do will be constrained by the minimum input voltage. 10. v n for other fixed voltage versions, as well as adjustable versions set to other output voltages, can be calculated from the foll owing formula: v n = v n(x) * (v out ? 1.25) / 1.25, where v n(x) is the typical value from the table above. 11. not tested in production. limits are guaranteed by design.
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 5 figure 3. measuring circuits input enable in output adj gnd NCP5500 r l c bulk 10 f c in 100 nf en i adj i gnd i q i en i in i out c out out ncv5500 input in output gnd r l c bulk 10 f c in 100 nf i gnd i q i in i out c out out ncv5501 circuit description the NCP5500/ncp5501/ncv5500/ncv5501 are integrated linear regulators with a dc load current capability of 500 ma. the output voltage is regulated by a pnp pass transistor controlled by an error amplifier and band gap reference. the choice of a pnp pass element provides the lowest possible dropout voltage, particularly at reduced load currents. pass transistor base drive current is controlled to prevent oversaturation. the regulator is internally protected by both current limit and thermal shutdown. thermal shutdown occurs when the junction temperature exceeds 150 c. the ncv5500 includes an enable/shutdown pin to turn of f the regulator to a low current drain standby state. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v out ) and drives the base of a pnp series pass transistor via a buffer. the reference is a bandgap design for enhanced temperature stability. saturation control of the pnp pass transistor is a function of the load current and input voltage. oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. regulator stability considerations the input capacitors (c bulk and c in ) are necessary to stabilize the input impedance to reduce transient line influences. the output capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. a tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with its almost zero esr, can cause instability. the aluminum electrolytic capacitor is the least expensive solution. however, if the circuit operates at low temperatures ( ? 25 c to ? 40 c), both capacitor value and esr will vary considerably. the capacitor manufacturer?s data sheet usually provides temperature performance data. stability is guaranteed for c out = 4.7 f and esr < 3 . enable input (NCP5500, ncv5500) the enable pin is used to turn the regulator on or off. by holding the pin at a voltage less than 0.5 v, the output of the regulator will be turned off to a minimal current drain state. when the voltage at the enable pin is greater than 2.0 v, the output of the regulator will be enabled and rise to the regulated output voltage. the enable pin may be connected directly to the input pin to provide a constant enable to the regulator. active load protection in shutdown (NCP5500, ncv5500) when a linear regulator is disabled (shutdown), the output (load) voltage should be zero. however, stray pc board leakage paths, output capacitor dielectric absorption, and inductively coupled power sources can cause an undesirable regulator output voltage if load current is low or zero. the ncv5500 features a load protection network that is active only during shutdown mode. this network switches in a shunt current path (~500 a) from v out to ground. this feature also provides a controlled (?soft?) discharge path for the output capacitor after a transition from enable to shutdown.
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 6 definition of terms dropout voltage: the input ? to ? output voltage differential at which the circuit ceases to regulate against further reduction input voltage. measured when the output voltage has dropped 2% relative to the value measured at 6.0 v input, dropout voltage is dependent upon load current and junction temperature. input voltage: the dc voltage applied to the input terminals with respect to ground. line regulation: the change in output voltage for a change in the input voltage. the measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. load regulation: the change in output voltage for a change in load current at constant chip temperature. pulse loading techniques are employed such that the average chip temperature is not significantly affected. quiescent current: the part of the positive input current that does not contribute to the positive load current. the regulator ground pin current with no load. ripple rejection: the ratio of the peak ? to ? peak input ripple voltage to the peak ? to ? peak output ripple voltage. current limit: peak current that can be delivered to the output. calculating power dissipation the maximum power dissipation for a single output regulator (figure 3) is: p d(max) v in(max) v out(min) i out(max) v in(max) i q (eq. 1) where v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, i gnd is the ground current at i out(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: r ja 150 c t a p d (eq. 2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja r jc r cs r sa (eq. 3) where r jc is the junction ? to ? case thermal resistance, r cs is the case ? to ? heatsink thermal resistance, r sa is the heatsink ? to ? ambient thermal resistance. r jc appears in the package section of the data sheet. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heat sink and the interface between them. these values appear in data sheets of heat sink manufacturers. thermal, mounting, and heat sink considerations are further discussed in on semiconductor application note an1040/d.
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 7 ordering information device nominal output voltage package marking package shipping ? NCP5500dt15rkg 1.5 p5500lg dpak ? 5 (pb ? free) 2500 / tape & reel ncv5500dt15rkg v5500lg dpak ? 5 (pb ? free) 2500 / tape & reel ncp5501dt15rkg p5501lg dpak (pb ? free) 2500 / tape & reel ncp5501dt15g p5501lg dpak (pb ? free) 75 units / rail ncv5501dt15rkg v5501lg dpak (pb ? free) 2500 / tape & reel ncv5501dt15g v5501lg dpak (pb ? free) 75 units / rail NCP5500dt50rkg 5.0 p5500ug dpak ? 5 (pb ? free) 2500 / tape & reel ncp5501dt50rkg p5501ug dpak (pb ? free) 2500 / tape & reel ncp5501dt50g p5501ug dpak (pb ? free) 75 units / rail NCP5500dtadjrkg adjustable p5500wg dpak ? 5 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 8 package dimensions dpak (single gauge) case 369c issue o d a k b r v s f l g 2 pl m 0.13 (0.005) t e c u j h ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.180 bsc 4.58 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.102 0.114 2.60 2.89 l 0.090 bsc 2.29 bsc r 0.180 0.215 4.57 5.45 s 0.025 0.040 0.63 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 123 4 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inches scale 3:1 recommended footprint
NCP5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 9 package dimensions d a k b r v s f l g 5 pl m 0.13 (0.005) t e c u j h ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.020 0.028 0.51 0.71 e 0.018 0.023 0.46 0.58 f 0.024 0.032 0.61 0.81 g 0.180 bsc 4.56 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.102 0.114 2.60 2.89 l 0.045 bsc 1.14 bsc r 0.170 0.190 4.32 4.83 s 0.025 0.040 0.63 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 0.170 3.93 4.32 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. r1 0.185 0.210 4.70 5.33 r1 1234 5 dpak 5, center lead crop case 175aa ? 01 issue a 6.4 0.252 0.8 0.031 10.6 0.417 5.8 0.228 scale 4:1 mm inches 0.34 0.013 5.36 0.217 2.2 0.086 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2 ? 9 ? 1 kamimeguro, meguro ? ku, tokyo, japan 153 ? 0051 phone : 81 ? 3 ? 5773 ? 3850 NCP5500/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082 ? 1312 usa phone : 480 ? 829 ? 7710 or 800 ? 344 ? 3860 toll free usa/canada fax : 480 ? 829 ? 7709 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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